TOPDIR=`pwd`
- Duplicate the baseline (excalibur --> str8100)
- copy the package related to the baseline, then change file name and contents
TOPDIR=`pwd`
#CYGPKG_HAL_ARM_ARM9_EXCALIBUR
cd ${TOPDIR}/ecos/packages/hal/arm/arm9;
#copy
cp excalibur str8100 -a;
find str8100 -name CVS -exec rm {} -rf \;
cd str8100/current;
#change the file name and contents
for a in `find . -name *excalibur* `; do echo a=$a ; b=`echo $a | sed 's/excalibur/str8100/'`;echo b=$b ;mv $a $b -v;done;
grep excalibur . -rHiIn | cut -d ":" -f 1|unique list; for a in `cat list` ; do echo $a;sed $a -e 's/excalibur/str8100/g' -e 's/EXCALIBUR/STR8100/g' -e 's/Excalibur/Str8100/g' > tmp; mv $a old; mv tmp $a;rm old tmp; done;
#verify script, nothing should be found
grep excalibur . -rHiIn;find . -name *excalibur*
#CYGPKG_DEVS_FLASH_ARM_EXCALIBUR
cd ${TOPDIR}/ecos/packages/devs/flash/arm;
#copy
cp excalibur str8100 -a;
find str8100 -name CVS -exec rm {} -rf \;
cd str8100/current;
#change the file name and contents
for a in `find . -name *excalibur* `; do echo a=$a ; b=`echo $a | sed 's/excalibur/str8100/'`;echo b=$b ;mv $a $b -v;done;
grep excalibur . -rHiIn | cut -d ":" -f 1|unique list; for a in `cat list` ; do echo $a;sed $a -e 's/excalibur/str8100/g' -e 's/EXCALIBUR/STR8100/g' -e 's/Excalibur/Str8100/g' > tmp; mv $a old; mv tmp $a;rm old tmp; done;
#verify script, nothing should be found
grep excalibur . -rHiIn;find . -name *excalibur*
cd ${TOPDIR}; - duplicate entries in ecos.db. Duplicate every "block" that has the keyword "excalibur", a target, a HAL package, and a FLASH package in this case.
cd ${TOPDIR};
vi ecos/packages/ecos.db - Test build
- Customize
console init procedure
由於我是由u-boot load ecos的，所以console已經被initial好了
只要直接寫入0x78000000，就會直接印出來了，之後再來寫console init的部份
似乎ㄧ開始就link到0x30000的位置...
在哪裡define的呢?
./packages/hal/arm/arm9/str8100/current/include/pkgconf/mlt_arm_arm9_str8100_ram.ldiSECTION_rom_vectors (ram, 0x30000, LMA_EQ_VMA)
現在只要ㄧcall HAL_DCACHE_ENABLE 就ㄧ整個怪
所有memory都抓不到，似乎MMU開了
ref linux/include/asm/system.h:33
packages/hal/arm/arm9/var/current/src/arm9_misc.c/*
* CR1 bits (CP#15 CR1)
*/
#define CR_M (1 << 0) /* MMU enable */
#define CR_A (1 << 1) /* Alignment abort enable */
#define CR_C (1 << 2) /* Dcache enable */
#define CR_W (1 << 3) /* Write buffer enable */
#define CR_P (1 << 4) /* 32-bit exception handler */
#define CR_D (1 << 5) /* 32-bit data address range */
#define CR_L (1 << 6) /* Implementation defined */
#define CR_B (1 << 7) /* Big endian */
#define CR_S (1 << 8) /* System MMU protection */
#define CR_R (1 << 9) /* ROM MMU protection */
#define CR_F (1 << 10) /* Implementation defined */
#define CR_Z (1 << 11) /* Implementation defined */
#define CR_I (1 << 12) /* Icache enable */
#define CR_V (1 << 13) /* Vectors relocated to 0xffff0000 */
#define CR_RR (1 << 14) /* Round Robin cache replacement */
#define CR_L4 (1 << 15) /* LDR pc can set T bit */void hal_hardware_init(void)
packages/hal/arm/at91/var/current/include/hal_cache.h
{
// Perform any platform specific initializations
plf_hardware_init();
// Set up eCos/ROM interfaces
hal_if_init();
#ifndef CYG_HAL_STARTUP_RAM
// Invalidate caches
HAL_DCACHE_INVALIDATE_ALL();
HAL_ICACHE_INVALIDATE_ALL();
#endif
// Enable caches
#ifdef CYGSEM_HAL_ENABLE_DCACHE_ON_STARTUP
HAL_DCACHE_ENABLE();
#endif
#ifdef CYGSEM_HAL_ENABLE_ICACHE_ON_STARTUP
HAL_ICACHE_ENABLE();
#endif
}
HAL_DCACHE_ENABLE enable 0xf#define HAL_ICACHE_ENABLE() \
CYG_MACRO_START \
asm volatile ( \
"mrc p15,0,r1,c1,c0,0;" \
"orr r1,r1,#0x1000;" \
"orr r1,r1,#0x0003;" /* enable ICache (also ensures */ \
/* that MMU and alignment faults */ \
/* are enabled) */ \
"mcr p15,0,r1,c1,c0,0" \
: \
: \
: "r1" /* Clobber list */ \
); \
CYG_MACRO_END
(......................................)
// Enable the data cache
#define HAL_DCACHE_ENABLE() \
CYG_MACRO_START \
asm volatile ( \
"mrc p15,0,r1,c1,c0,0;" \
"orr r1,r1,#0x000F;" /* enable DCache (also ensures */ \
/* the MMU, alignment faults, and */ \
/* write buffer are enabled) */ \
"mcr p15,0,r1,c1,c0,0" \
: \
: \
: "r1" /* Clobber list */ \
); \
CYG_MACRO_END
HAL_ICACHE_ENABLE enalbe 0x1003
都會enable MMU....
這時候enable MMU對嗎？不是應該在後面hal_MMU_init做的嗎?
eCos image應該這麼早就enable MMU嗎????
use ROMRAM instead of RAM (in cdl)
hal_arm_arm9_str8100.cdlcdl_component CYG_HAL_STARTUP {
用ecosconfig import
display "Startup type"
flavor data
default_value {"RAM"}
legal_values {"RAM" "ROM" "ROMRAM" "REDBOOT" }cdl_component CYG_HAL_STARTUP {
user_value ROMRAM
};
enables後trace32沒辦法load elf file, 出現bus error generated by CPU
try enalbe LED function first...
./packages/hal/arm/arch/current/src/vectors.S// CYGHWR_LED_MACRO can be defined in hal_platform_setup.h. It's free to
packages/hal/arm/arm9/str8100/current/include/hal_platform_setup.h
// use r0+r1. Argument is in "\x" - cannot use macro arguments since the
// macro may contain #-chars and use of arguments cause these to be
// interpreted as CPP stringify operators.
// See example in PID hal_platform_setup.h.
#ifndef CYGHWR_LED_MACRO
#define CYGHWR_LED_MACRO
#endif
.macro LED x
CYGHWR_LED_MACRO
.endm#define nDEBUG
packages/hal/arm/arm9/str8100/current/include/str8100.h
(............................)
#ifdef DEBUG
#define CYGHWR_LED_MACRO \
ldr r0,=(STR8100_UART0_BASE+_UART_TD); \
mov r1,#((\x) + 0x61); \
str r1,[r0];
#endif#define STR8100_BASE STR8100_REGS_PHYS_BASE
(...................................)
#define STR8100_REGS_PHYS_BASE 0x7fffc000
(...................................)
#define STR8100_UART0_BASE (STR8100_BASE+0x0280)
ARM9
__exception_handlers(./packages/hal/arm/arch/current/src/vectors.S)
-reset_vector(./packages/hal/arm/arch/current/src/vectors.S)
--hal_hardware_init(./ecos/packages/hal/arm/arm9/var/current/src/arm9_misc.c)
---HAL_DCACHE_ENABLE(./packages/hal/arm/arm9/var/current/include/hal_cache.h)
---HAL_ICACHE_ENABLE(./packages/hal/arm/arm9/var/current/include/hal_cache.h)
--hal_ctrlc_isr_init
--cyg_hal_invoke_constructors
--cyg_start
zzz
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